Memory devices are known in the art for storing data in a wide variety of electronic devices and applications. A typical flash memory device comprises a number of memory cells. Often, memory cells are arranged in an array format, where a row of memory cells corresponds to a word line and a column of memory cells corresponds to a bit line, and where each memory cell defines a binary bit, i.e., either a zero (“0”) bit or a one (“1”) bit.
Typically, the state of a memory cell is determined during a read operation by sensing the current drawn by the memory cell. According to one particular embodiment, the current drawn by a particular memory cell (also referred to as “target memory cell” or “core memory cell”) is ascertained by connecting the drain terminal of the memory cell to a sensing circuit, where the source terminal of the memory cell is connected to ground, and the gate of the memory cell is selected. The sensing circuit attempts to detect the current drawn by the memory cell (also referred to as “target memory cell current” or “core cell current”), and compares the sensed memory cell current against a reference current. If the sensed memory cell current exceeds the reference current, the memory cell is considered an erased cell, e.g., corresponding to a “1” bit. However, if the sensed memory cell current is below the reference current, the memory cell is considered a programmed cell, e.g., corresponding to a “0” bit.
Cascode amplifiers are known in the art for converting current to voltage. Current to voltage conversion is particularly useful when a comparison between a first current, such as that drawn by a target memory cell, and a second current, such as that drawn by a reference memory cell, is required. The reason is that voltage comparators, such as operational amplifiers, for example, are readily available for comparing two voltage values. Accordingly, the conventional approach in comparing two current values involves first converting the current values to voltage values, and then comparing the voltage values using an operational amplifier or other voltage comparator. In this way, during a read operation involving a target memory cell, a conventional cascode amplifier supplies a bit line voltage to the drain of the target memory cell, and generates a sense amp input voltage which corresponds to the current drawn by the target memory cell. Similarly, a sense amp reference voltage can be ascertained corresponding to the current drawn by a reference memory cell, and the sense amp input voltage and the sense amp reference voltage can be compared to determine the state of the target memory cell.
Known cascode amplifiers, however, suffer from a number of problems, which negatively impact the performance of flash memory devices. Typically, conventional cascode amplifiers produce a relatively low DC gain (from the bit line voltage to the sense amp input voltage), particularly at low current, e.g., when a programmed target memory cell draws low current. As a result, the signal generated at the sense amp input voltage is considerably limited, and, thus, accuracy in identifying the state of the target memory cell is negatively impacted, and read operations of the flash memory device are degraded. Furthermore, the bit line voltage supplied to the drain of the target memory cell achieved by conventional cascode amplifiers have a limited range and, therefore, cannot be flexibly used for various types of memory cells that require a drain voltage outside of the limited range provided by conventional cascode amplifiers.
Accordingly, there exists a strong need in the art to overcome deficiencies of known cascode amplifier circuits, such as those described above, and to provide a flexible cascode amplifier circuit with high gain for flash memory devices.